Abstract
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This paper describes how to enrich a Syste … This paper describes how to enrich a System-on-Chip (SoC) design by flexible monitoring capabilities allowing to analyze the system's execution for ensuring safety requirements. To this end, a general SoC architecture is described enriched by observation means. Moreover, it is described how verification properties expressed in a temporal stream-based specification language can be translated into a monitor expressed in a hardware description language (Verilog) checking the underlying property. Finally, the link between the SoC and the monitoring unit is explained. Overall, a self-observing system is obtained that works coherently with the SoC. tained that works coherently with the SoC.
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Author
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José Rufino +
, Felix Dino Lange +
, Martin Leucker +
, Torben Scheffel +
, Malte Schmitz +
, Daniel Thoma +
, António Casimiro +
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Document
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Document for Publication-Rufino18C.pdf +
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Journal
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Ada User Journal +
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Key
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Rufino18C +
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Month
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dec +
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NumPubDate
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2,018.12 +
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Pages
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296–299 +
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Project
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Project:NORTH +
, Project:COST Action IC1402 +
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ResearchLine
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Timeliness and Adaptation in Dependable Systems (TADS) +
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Title
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Non-intrusive Runtime Verification within a System-on-Chip +
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Type
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article +
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Volume
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39 +
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Year
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2018 +
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Has improper value forThis property is a special property in this wiki.
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Url +
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Categories |
Publication +
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Modification dateThis property is a special property in this wiki.
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1 May 2019 12:37:03 +
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NumberThis property is a special property in this wiki.
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4 +
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